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A new stochastic decoding algorithm, called Delayed Stochastic (DS) decoding, is introduced to implement low-density-parity-check (LDPC) dec… (see more)oders. The delayed stochastic decoding uses an alternative method to track probability values, which results in reduction of hardware complexity and memory requirement of the stochastic decoders. It is therefore suitable for fully-parallel implementation of long LDPC codes with applications in optical communications. Two decoders are implemented using the DS algorithm for medium (2048, 1723) and long (32768, 26624) LDPC codes. The decoders occupy 3.93- mm2 and 56.5- mm2 silicon area using 90-nm CMOS technology and provide maximum core throughputs of 172.4 and 477.7 Gb/s at [(Eb)/(No)]=5.5 and 4.8 dB, respectively.
2011-11-01
IEEE Transactions on Signal Processing (published)
A new stochastic decoding algorithm, called Delayed Stochastic (DS) decoding, is introduced to implement low-density-parity-check (LDPC) dec… (see more)oders. The delayed stochastic decoding uses an alternative method to track probability values, which results in reduction of hardware complexity and memory requirement of the stochastic decoders. It is therefore suitable for fully-parallel implementation of long LDPC codes with applications in optical communications. Two decoders are implemented using the DS algorithm for medium (2048, 1723) and long (32768, 26624) LDPC codes. The decoders occupy 3.93- mm2 and 56.5- mm2 silicon area using 90-nm CMOS technology and provide maximum core throughputs of 172.4 and 477.7 Gb/s at [(Eb)/(No)]=5.5 and 4.8 dB, respectively.
2011-11-01
IEEE Transactions on Signal Processing (published)
Being one of the most efficient solutions to implement forward error correction (FEC) decoders based on belief propagation, stochastic proce… (see more)ssing is thus a method worthy of consideration when addressing the decoding of emerging codes such as Cortex codes. This code family offers short block codes with large Hamming distances. Unfortunately, their construction introduces many hidden variables making them difficult to be efficiently decoded with digital circuits implementing the Sum-Product algorithm. With the introduction of multiple stochastic streams, the proposed solution alleviates the hidden variables problem thus yielding decoding performances close to optimal. Morevover, this new stochastic architecture is more efficient in terms of complexity-throughput ratio compared to recently published stochastic decoders using either edge or tracking forecast memories.
2011-07-01
IEEE Transactions on Signal Processing (published)
Being one of the most efficient solutions to implement forward error correction (FEC) decoders based on belief propagation, stochastic proce… (see more)ssing is thus a method worthy of consideration when addressing the decoding of emerging codes such as Cortex codes. This code family offers short block codes with large Hamming distances. Unfortunately, their construction introduces many hidden variables making them difficult to be efficiently decoded with digital circuits implementing the Sum-Product algorithm. With the introduction of multiple stochastic streams, the proposed solution alleviates the hidden variables problem thus yielding decoding performances close to optimal. Morevover, this new stochastic architecture is more efficient in terms of complexity-throughput ratio compared to recently published stochastic decoders using either edge or tracking forecast memories.
2011-07-01
IEEE Transactions on Signal Processing (published)
Stochastic computation is a technique in which operations on probabilities are performed on random bit streams. Stochastic decoding of forwa… (see more)rd error-correction (FEC) codes is inspired by this technique. This paper extends the application of the stochastic decoding approach to the families of convolutional codes and turbo codes. It demonstrates that stochastic computation is a promising solution to improve the data throughput of turbo decoders with very simple implementations. Stochastic fully-parallel turbo decoders are shown to achieve the error correction performance of conventional a posteriori probability (APP) decoders. To our knowledge, this is the first stochastic turbo decoder which decodes a state-of-the-art turbo code. Additionally, an innovative systematic technique is proposed to cope with stochastic additions, responsible for the throughput bottleneck.
2010-12-01
IEEE Transactions on Signal Processing (published)
Stochastic computation is a technique in which operations on probabilities are performed on random bit streams. Stochastic decoding of forwa… (see more)rd error-correction (FEC) codes is inspired by this technique. This paper extends the application of the stochastic decoding approach to the families of convolutional codes and turbo codes. It demonstrates that stochastic computation is a promising solution to improve the data throughput of turbo decoders with very simple implementations. Stochastic fully-parallel turbo decoders are shown to achieve the error correction performance of conventional a posteriori probability (APP) decoders. To our knowledge, this is the first stochastic turbo decoder which decodes a state-of-the-art turbo code. Additionally, an innovative systematic technique is proposed to cope with stochastic additions, responsible for the throughput bottleneck.
2010-12-01
IEEE Transactions on Signal Processing (published)
This paper describes and analyzes a hierarchical algorithm called Multiscale Gossip for solving the distributed average consensus problem in… (see more) wireless sensor networks. The algorithm proceeds by recursively partitioning a given network. Initially, nodes at the finest scale gossip to compute local averages. Then, using multi-hop communication and geographic routing to communicate between nodes that are not directly connected, these local averages are progressively fused up the hierarchy until the global average is computed. We show that the proposed hierarchical scheme with
Stochastic decoding is a recently proposed approach for graph-based iterative error control decoding. We present and investigate three hyste… (see more)resis methods for stochastic decoding on graphs with cycles and show their close relationship with the successive relaxation method. Implementation results demonstrate the tradeoff in bit error rate performance with circuit complexity.
2010-11-01
IEEE Transactions on Signal Processing (published)
